Lecture Notes 06 (31 January 2002)

Logic Gates

Please Note:

  • Today's lecture will involve many demonstrations using the "Logg-O" software from the DH text. Please see the following information regarding using the Decker/Hirschfield software.
    • Overall Reading
    Brookshear: pp. 20-23
    Decker/Hirshfield: Mod. 7.3

    Outline:

  • Revisiting Circuits
  • Multiplexor
  • Half-adder
  • Full-adder
  • Circuits with feedback
  • A simple example
  • A flip-flop
  • A latch

    • Revisiting Circuits

  • Multiplexor
    Here is a circuit modeled closely after that in Figure 7.11 of [DH] [demo Logg-O file]

    What does it do?

    How can we determine this? How do we describe the behavior?

    One possibility is to draw a truth table of all possible scenarios: (lets label the three switches as A, B and C, starting from the top.

    ABCresult
    0000
    1000
    0101
    1101
    0010
    1011
    0110
    1111

    But behavior is still not very intuitive. Perhaps if we think about the logic of the circuit it will be more clear. In particular, the key to understanding this particular circuit is looking at switch C.

    If C=0,

  • then the top AND gate will definately have output 0.
  • this means that the OR gates output will be equal to that of the bottom AND gate
  • the second input to the bottom AND gate is 1, and so the output of that gate will be equal to the input from switch B.
  • Therefore, the circuit output is equal to input from switch B.

    • Alternatively, if C=1,

  • the second input to the bottom AND gate is 0, and so that gate will definately have output 0.
  • this means that the OR gates output will be equal to that of the top AND gate
  • the second input to the top AND gate is 1, and so the output of that gate will be equal to the input from switch A.
  • Therefore, the circuit output is equal to input from switch A.

    • So this circuit simply lets the signal from either input A or input B to pass through, where the choice is controled by switch C.
    It is called a two-way multiplexor (MUX).

  • Half-adder

    Addition in binary is particularly easy. When you add a column, there are two relevant bits of information as a result.

  • sum: what bit is the result for this column of the sum
  • carry: did a carry take place to the next column?

    • If we want to design a circuit for this process, it would have the following behavior:

    ABsumcarry
    0000
    0110
    1010
    1101

    Here is a circuit which implements the behavior: [demo Logg-O file]

    However, this circuit only works for the rightmost column of the addition, in which there are two bits of input.

    For a general column, we must consider the possibility of three bits of input, since a carry may have taken place in the previous column.

    Therefore, the circuit above is called a one-bit, half-adder (as shown in Figure 7.7 of [DH]).

  • Full-adder

    A one-bit, full-adder is a circuit designed to do addition on a general column, in which there are three bits of input.

    A full-adder can be built by properly combining two half-adders. A schematic is shown in Figure 7.8 of [DH]. (The precise circuit will be built as part of the next assignment.)

    • Circuits with feedback

    We have already seen that the output of one gate can be used as the input of another gate.

    We say that a circuit has feedback if the output of a gate might eventually lead back and become input to that same gate!

    Though some very bizarre things may happen, if used properly, this technique can lead to circuits that demonstrate a "memory" for the past.

  • A simple example What value will the output have in the following circuit if the switch were turned off? [demo Logg-O file]

  • A flip-flop

    Here is a circuit called a flip-flop, from Figure 1.3 of [Br]. [demo Logg-O file]

    Up until now, the output of a circuit has been determined completely by the current settings of the input switches. The output of a flip-flop may also depend on the recent history of the input settings.

    Specifically, let's examine the output of the circuit in the case where both input switches are off. By examination, we find that

  • the output is 1 if the top switch was the most recent switch to be on.
  • the output is 0 if the top switch was the most recent switch to be on.

    • The circuit serves as one bit of memory

  • A latch Another type of circuit which demonstrates memory is a latch.

    Here is a diagram, modified slightly from Figure 7.15 of [DH]. [demo Logg-O file]

    Its behavior is as follows:

  • when the bottom switch is set to 1, the output of the circuit is exactly equal to the setting of the top switch.
  • when the bottom switch is changed to 0, the output of the circuit is essentially frozen to its current value. After this point, changing the top switch has no effect, so long as the bottom switch remains set to 0.

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    Last modified: 5 February 2002